​​​​​​Vol. 2, No. 10, 2017, pp. 345-353. 

​

​Power Analysis of Sense Amplifier Designs for low voltage Memories   

K. Gavaskar*, G. Ravivarma
Department of Electronics and Communication Engineering, Kongu Engineering College, Erode, Tamilnadu – 638 060. India.
​​​*Corresponding author’s e-mail: gavas.20@gmail.com

​Abstract
A memory array structure consists of matrix of SRAM (Static Random Access Memory) cells in which each memory cell in an array structure can be accessed by row and a column decoder. Sense amplifier plays a vital role in memory array structure.The job of a sense amplifier is to sense the bit lines and retrieve the stored data in a memory.Reducing the power consumption of the sense amplifier reduces the power consumption of the whole circuit.The above explained operation can be carried out using Synopsys-Custom Designer tool by applying some optimization techniques like stack, sleep transistor sleepy stack and leakage feedback techniques.

Keywords: Sense amplifier; Power; Low voltage; Memories. 

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International Journal of Modern Science and Technology

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ISSN 2456-0235